1) Field of the Invention
Embodiments of this invention relate to methods and equipment for polishing semiconductor substrates.
2) Discussion of Related Art
Integrated circuits are formed on semiconductor wafers. The wafers are then sawed (or “singulated” or “diced”) into microelectronic dice, also known as semiconductor chips, with each chip carrying a respective integrated circuit. Each semiconductor chip is then mounted to a package, or carrier, substrate. Often the packages are then mounted to a motherboard, which may then be installed into a computing system.
Numerous steps may be involved in the creation of the integrated circuits, such as the formation and etching of various semiconductor, insulator, and conductive layers. After the formation of these layers, particularly conductive layers, an upper surface thereof may include alternating raised and recessed roughness formations, i.e., the upper surfaces are not smooth. Before the manufacturing of the integrated circuits can be completed, the upper surfaces of these layers must be polished, or grinded, to remove unwanted material and smooth the upper surfaces (i.e., remove the roughness formations).
Several methods are currently used to polish the semiconductor wafers, such as chemical-mechanical polishing, electrochemical polishing, pure electro-polishing, and chemical etching. Chemical-mechanical polishing often produces shear stresses on the surface of the semiconductor substrate that can damage features on the substrate and insulating layers beneath the conductive layer, particularly when sensitive low-k materials are used. Electro-chemical polishing is often unable to remove all of the desired material. Electro-polishing, which requires an electrical connection to the conductive layer, is also unable to completely remove the unwanted material, as sections of the conductive layer become electrically disconnected from the remainder of the conductive layer. Chemical etching is not able to evenly remove the conductive layer, which may result in some portions of the conductive layer being left on the substrate and some features of the integrated circuits being damaged.